9150 FIFO Enable Register

I am trying to set the top 5 bits to '1' in the FIFO Enable Register (Register 35) which would enable:

TEMP_FIFO_EN
XG_FIFO_EN
YG_FIFO_EN
ZG_FIFO_EN
ACCEL_FIFO_EN

So the value I write to the register is 0xF8, or 0b11111000

When I read back that same register, I get 0xD0, or 0b11010000

This means that setting YG_FIFO_EN and ACCEL_FIFO_EN does not work.

I've tried setting bits independently and all at once with no success. What could be the problem?

As an aside, I'm using the MPU-6050 register map assuming that it reflects the 9150 register map (seeing as I'm programming blind with no register map). If this is the issue, please let me know.

Thanks in advance.