Hello
I'm facing an issue concerning reading FIFO data using ICM-20602.
Can anyone shine a light on the problem and give me some recommendantions on how to proceed?
I want to read 1008 bytes from FIFO after ICM is done filling it, and repeat this process continuously
I found that after an interrupt is issued (either by watermark reached and by FIFO overflow - since I tested both modes), it is not possible to perform further commands or readings over SPI interface.
This is my startup configuration (with 10MHz SPI clock):
#define write 0x00U
#define read 0x80U
#define habilitarPWRMng2 0x00
srcBuff[0] = write | REG_PWR_MGMT_1; //†::: Comando de reset - registrado 6B
srcBuff[1] = DEVICE_RESET; //
SPI_WRITE(srcBuff); // Write command
delay(1000); //waits 1 second
srcBuff[0] = write | REG_PWR_MGMT_1; //†::: Comando de reset
srcBuff[1] = (0x01U << CLKSEL_SHIFT) & CLKSEL; //
SPI_WRITE(srcBuff); // Write command
srcBuff[0] = write | REG_PWR_MGMT_2; //†::: Registrador PWR_MGMT_2
srcBuff[1] = STBY_XA | STBY_YA | STBY_ZA | STBY_XG | STBY_YG | STBY_ZG; // Desabilita acelerometro e giroscopio
SPI_WRITE(srcBuff); // Write command
srcBuff[0] = write | REG_USER_CTRL; //†::: FIFO
srcBuff[1] = FIFO_EN & 0x00U; //
SPI_WRITE(srcBuff); // Write command
srcBuff[0] = write | REG_I2C_IF; //†:::
srcBuff[1] = I2C_IF_DIS;
SPI_WRITE(srcBuff); // Write command
srcBuff[0] = write | REG_ACCEL_CONFIG; // :::
srcBuff[1] = ACCEL_PRECISION << ACCEL_FS_SEL_SHIFT; //
SPI_WRITE(srcBuff); // Write command
srcBuff[0] = write | REG_ACCEL_CONFIG_2; //†:::
srcBuff[1] = (0x00 << DEC2_CFG_SHIFT) | (0x00 << ACCEL_FCHOICE_B_SHIFT);// 1000 0000
SPI_WRITE(srcBuff); // Write command
srcBuff[0] = write | REG_PWR_MGMT_2; //†::: Registrador PWR_MGMT_2
srcBuff[1] = ((STBY_XA & ENABLE) | (STBY_YA & ENABLE) | (STBY_ZA & ENABLE) | (STBY_ZG & ENABLE) | (STBY_YG & ENABLE) | (STBY_XG & ENABLE)); // Habilita acelerometro e giroscopio
With this rotine, I'm able to read WHO_AM_I register. I'm also able to read accel, gyro and temp registers.
Following is the configuration I'm using for enabling watermark (I'm trying to read 1008 bytes from the FIFO before it starts to overwrite old data) - It is possible to read FIFO data before the interrupt occurs. Once the interrupt is latched, I can't no longer contact the ICM-20602 via SPI.
// Define o sample rate divider:
// - SMPLRT_DIV=0x63 (99 para gerar 10 Hz)
srcBuff[0] = write | REG_SMPLRT_DIV; //†::: Ler ACCEL_XOUT_H
srcBuff[1] = (SMPLRT_DIV & 0x63U); //
SPI_WRITE(srcBuff); // Write command
// Determinar o FIFO_MODE no registro CONFIG:
// - FIFO_MODE=1
srcBuff[0] = write | REG_CONFIG; //†::: Ler ACCEL_XOUT_H
srcBuff[1] = ((0x00 << FIFO_MODE_SHIFT) | (DLPF_CFG & 0x01)) & (~EXT_SYNC_SET); //
SPI_WRITE(srcBuff); // Write command
// Pré-requisito do sample divider:
// - CONFIG register, DLPF_CFG=001
// - GYRO_CONFIG register, FCHOICE_B = 00
srcBuff[0] = write | REG_GYRO_CONFIG; //†::: Ler ACCEL_XOUT_H
srcBuff[1] = (FS_SEL | (FCHOICE_B & 0x00U)) & (~XG_ST) & (~YG_ST) & (~ZG_ST); //
SPI_WRITE(srcBuff); // Write command
// - ACCEL_CONFIG2 register, ACCEL_FCHOICE_B = 0 and A_DLPF_CFG = 001
srcBuff[0] = write | REG_ACCEL_CONFIG_2; //†::: Ler ACCEL_XOUT_H
srcBuff[1] = ((ACCEL_FCHOICE_B & 0x00U) | (A_DLPF_CFG & 0x01U)) & (~XA_ST) & (~YA_ST) & (~ZA_ST); //
SPI_WRITE(srcBuff); // Write command
// - ACCEL_FIFO_EN=1
// - GYRO_FIFO_EN=1
srcBuff[0] = write | REG_FIFO_EN; //†::: Ler ACCEL_XOUT_H
srcBuff[1] = GYRO_FIFO_EN | ACCEL_FIFO_EN; //
SPI_WRITE(srcBuff); // Write command
// Habilitar Interrupção:
// - INT_LEVEL=0
// - INT_OPEN=0
// - LATCH_INT_EN=1
// - INT_RD_CLEAR=1
srcBuff[0] = write | REG_INT_PIN_CFG; //†::: Ler ACCEL_XOUT_H
srcBuff[1] = (0x00 << INT_LEVEL_SHIFT) | (0x00U << INT_OPEN_SHIFT) | (0x01U << LATCH_INT_EN_SHIFT) | (0x01 << INT_RD_CLEAR_SHIFT); //
SPI_WRITE(srcBuff); // Write command
uint16_t watermark = 1008U;
// Watermark MS2b
srcBuff[0] = write | REG_FIFO_WM_TH1; //†::: Ler ACCEL_XOUT_H
srcBuff[1] = FIFO_WM_TH_2MSb & (watermark >> 8); //
SPI_WRITE(srcBuff); // Write command
// Watermark LSB
srcBuff[0] = write | REG_FIFO_WM_TH2; //†::: Ler ACCEL_XOUT_H
srcBuff[1] = FIFO_WM_TH_LSB & (watermark & 0x00FFU); //
SPI_WRITE(srcBuff); // Write command
// enable fifo
srcBuff[0] = write | REG_USER_CTRL; //†::: FIFO
srcBuff[1] = 0x01U << FIFO_EN_SHIFT;
SPI_WRITE(srcBuff); // Write command
// Habilita interrupção
//
srcBuff[0] = write | REG_INT_ENABLE; //†::: Ler ACCEL_XOUT_H
srcBuff[1] = 0x00; // Habilitar apenas este
SPI_WRITE(srcBuff); // Write command
Also, how can I read the whole FIFO buffer using a single register (FIFO_R_W)?
Can anyone help me?