I build application base on SparkFun software where I made adaption to nRF52 Nordic family.
In some of the setting I need to first read the reg and then make the changes in the require places , then write it back.
Every time before make any setting I change the bank to the require one and also check it was set according (compare write to read to/from REG_BANK_SEL) and it did. Then I check on several banks if what I read is the some as what I write before .I found that only on bank 0 read =write on the some reg. But on other banks it just replay all the time 0x01.I do also step by step so it is not delay issue.
I check that I change the bank sel on bits 4:5 as require. attach the bank change code and 1 write and read example.
static int changeUserBank(ICM20948_DRIVER_BUNDLE_PTR driver_bundle, ICM20948_UserBank userBank)
{
uint8_t userBankRegValue = (userBank<< 4) & 0x30; // bits 5:4 of REG_BANK_SEL;
uint8_t temp_userBankRegValue = 0;
if (writeRegister(driver_bundle, REG_BANK_SEL, (uint8_t *)&userBankRegValue, 1) != 0) {
return IO_ERROR_ICM20948__REG_WRITE_FAIL;
}
// check if the device get the require bank
if (readRegisters(driver_bundle, REG_BANK_SEL, 1, &temp_userBankRegValue) != 0) {
return IO_ERROR_ICM20948__REG_READ_FAIL;
}
temp_userBankRegValue &= USER_BANK_MASK_BITS;
if(userBankRegValue != temp_userBankRegValue)
{
return IO_ERROR_ICM20948__CONFIG_FAIL;
}
}int ICM20948_configAccel(ICM20948_DRIVER_BUNDLE_PTR driver_bundle, ICM20948_AccelRange range, ICM20948_AccelDlpfBandwidth bandwidth) {
if (changeUserBank(driver_bundle, USER_BANK_2) != 0) {
return IO_ERROR_ICM20948__REG_WRITE_FAIL;
}
ICM20948_ACCEL_CONFIG_t acc_setting;
acc_setting.ACCEL_FS_SEL = range;
if (writeRegister(driver_bundle, UB2_REG_ACCEL_CONFIG, (uint8_t*)&acc_setting, 1) != 0) {
return IO_ERROR_ICM20948__REG_WRITE_FAIL;
} uint8_t test = 0;
if (readRegisters(driver_bundle, UB2_REG_ACCEL_CONFIG,1, &test) != 0) {// test
return IO_ERROR_ICM20948__REG_WRITE_FAIL;
}
return IO_ERROR_ICM20948__OK;
}