When I put the MPU-9250 into low-power mode (using mpu_lp_motion_interrupt from eDriver 6.1), it changes the interrupt into latched-mode.
If I handle the interrupt on the rising edge (I have it active high), sometimes it will fail to correctly handle an I2C read of Interrupt Status register 0x3A.
When it fails, it holds SDA low for an indeterminate period (at least several seconds). This happens as soon as the interrupt edge falls. (See attachments I2C_Read_Fail.png and I2C_Read_Success.png for examples of fail and success.)
None of the specification pages or register map discuss interrupt timing and I2C reads.
Currently I need to change to using the falling edge, which is much less than optimum because it will take more than the entire low-power ODR period before the latched interrupt falls low. With a 1.25Hz rate, that is about 1000ms; at 2.5Hz, it is typically 519ms.
Martin