MPU9150 Register 58 – Interrupt Status - Bit1 and Bit2

Hi,

can anyone tell me more about Bit1 and Bit2 of the Interrupt Status Register (58) of the MPU9150. These bits are not documented in the Register Map and Descriptions Revision 4.0 Bit1 semms to be set if the dmp had pushed any data to the fifo. Is that right? What is the meaning of Bit2?

Thanks in advance.