resetting the DMP with USER_CTRL

By sushil , 1 November 2014

From the datasheet for MPU-6050 and MPU-6500, in register 106 (USER_CTRL) I found a bit named DMP_RST which "resets the DMP" when set and auto resets once the reset operation is completed. Does this mean that setting this bit forces the DMP to start its program from the beginning? and if not what exactly does this bit do?
My project requires both low power and DMP calculation, but after letting the MPU6500 go to sleep mode, moving the IMU to a different position and waking it up, the reading from the DMP takes a while to settle to its real values from its pre-sleeping values (Which I suppose is the normal behavior of the low-pass component of the filter used by the DMP, since disabling accelerometers and gyroscope in sleep mode will cut the sampling stream of the DMP, and after waking up the change in readings will result in a "step", which is smoothed out by the low pass filter, resulting in the slow settling speed).
The problem is I need the readings to settle immediately after waking the IMU up, and therefore need to discard the previous sensor values weighted in the DMP filter before sleeping, hence the program inside the DMP should run from the beginning after waking up. Disabling and re-loading the DMP firmware does the trick, but I consider this a waste of MCU calculation power and time.
So I tried setting the DMP_RST bit high after waking the IMU up and waited for it to resets before reading from the DMP FIFO again, but it seemed to have no effects on the post-sleeping values whatsoever. That is to say, the values still started as the post-sleeping values and need a lot of time (about 2 seconds) to settle to the right value.
So am I doing this right? Or is the DMP_RST bit for a different purpose?
Thank you :D

guy_mcilroy

11 years 4 months ago

The DMP_RST resets the DMP fifo and triggers the DMP calculations again, in order to enable and disable the DMP the following code snippet could be useful;
/**
* @brief Enable/disable DMP support.
* @param[in] enable 1 to turn on the DMP.
* @return 0 if successful.
*/
int mpu_set_dmp_state(unsigned char enable)
{
unsigned char tmp;
if (st.chip_cfg.dmp_on == enable)
return 0;

if (enable) {
if (!st.chip_cfg.dmp_loaded)
return -1;
/* Disable data ready interrupt. */
set_int_enable(0);
/* Disable bypass mode. */
mpu_set_bypass(0);
/* Keep constant sample rate, FIFO rate controlled by DMP. */
mpu_set_sample_rate(st.chip_cfg.dmp_sample_rate);
/* Remove FIFO elements. */
tmp = 0;
i2c_write(st.hw->addr, 0x23, 1, &tmp);
st.chip_cfg.dmp_on = 1;
/* Enable DMP interrupt. */
set_int_enable(1);
mpu_reset_fifo();
} else {
/* Disable DMP interrupt. */
set_int_enable(0);
/* Restore FIFO settings. */
tmp = st.chip_cfg.fifo_enable;
i2c_write(st.hw->addr, 0x23, 1, &tmp);
st.chip_cfg.dmp_on = 0;
mpu_reset_fifo();
}
return 0;
}

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